The present application claims priority to Japanese Application No. P10 180056 filed Jun. 26, 1998, which application is incorporated herein by reference to the extent permitted by law.
1. Field of the Invention
The present invention relates to a method for fabricating MOS transistors, in particular to a method for fabricating MOS transistors having both a p-type gate electrode of a p-type MOS transistor (PMOS) and a silicon nitride film on a substrate, in which boron (B) in the p-type gate electrode is effectively prevented from diffusing away and from punching through the adjacent gate oxide film.
2. Description of the Related Art
Complementary MOS transistor (CMOS) circuits having both an N-type MOS transistor (NMOS) and a p-type MOS transistor (PMOS) on one and the same substrate have the advantages of reduced power consumption and quick operation as fine patterning to increase the degree of integration in fabricating them is easy, and they have many applications, for example, for memory units and logical units and for other various LSI devices.
Various films of n+-type polysilicon films as well as their polycide films or polymetal films as combined with high-melting point metal silicide films or high-melting-point metal films have heretofore been used as the materials for constituting the gate electrode in PMOS for CMOS, like those for the gate electrode in NMOS. The reason is because n+-type polysilicon films are well durable in high-temperature processes. In addition, for its channel profile, since the gate electrode of the film of that type has an embedded structure, it enjoys a high bulk mobility and therefore has the advantage of quick operation.
However, in such embedded channel-type MOS transistors, the tip of the depletion layer extending from the source/drain region is too near to another one adjacent thereto in the deep part of the substrate, as being influenced by the gate electric field, thereby often causing punch-through. This means the difficulty in controlling the short channel effect in coming deep sub-micron generation devices in the art. Therefore, it is necessary to change the embedded channel structure to a surface channel structure.
In order to attain the surface channel profile, the gate electrode in PMOS shall be made of a p+-type polysilicon film.
Another reason why the p+-type polysilicon film is desired for the gate electrode material in PMOS is as follows:
In conventional CMOS circuits where the gate electrodes in NMOS and PMOS are all made of an n+-type polysilicon film, the work function differs between NMOS and PMOS and the threshold voltage Vth in them shall be asymmetric to each other owing to that difference. Therefore, boron ions are implanted in a shallow site in the PMOS channel region so as to make the threshold voltage Vth in the two transistors NMOS and PMOS nearly equal to each other (generally, at most 1 V). However, the ion implantation for threshold voltage control increases the dopant concentration in the surface of the substrate, whereby the carrier mobility near the surface of the substrate is reduced. The reduction in the carrier mobility is contradictory to quick operation of transistors. Therefore, in coming transistor devices, reducing the channel dopant concentration is indispensable.
However, using a p+-type polysilicon film having a large work function in forming the gate electrode in PMOS enables symmetrical threshold voltage Vth in NMOS and PMOS without increasing the channel dopant concentration. This leads to symmetrical input-output characteristics of transistors having a basic gate structure of CMOS inverters, and even to the improvement in the symmetrical signal transmission characteristics of such transistors.
The CMOS structure in which the gate electrode in PMOS has a p-type conductivity and that in NMOS has an n-type conductivity is referred to as a dual gate CMOS.
In an ordinary process of fabricating CMOS circuits, in general, the gate electrode in NMOS and that in PMOS are all made through patterning of a polysilicon film common thereto. In the process, therefore, different dopant ions are separately implanted in the regions to be the gate electrodes for the two, NMOS and PMOS, via masks, thereby making the gate electrodes for the two have different types of conductivity. Briefly, arsenic (As) ions or phosphorus (P) ions are implanted in the region to be the n+-type gate electrode, while boron (B) ions are in the region to be the p+-type electrode.
However, the boron implantation is problematic in that the boron introduced into the silicon film often diffuses away when the substrate is exposed to high temperatures in subsequent steps. In that condition, the boron thus having diffused from the silicon film is taken into the gate oxide film or, as the case may be, it punches through the gate oxide film to reach the substrate (Si). The boron diffusion will occur in various scenes in the subsequent steps of, for example, activated annealing of source/drain regions, self-aligned silicification (process for SALICIDE, Self-ALIgned siliCIDE), reflowing of interlayer insulating films, etc., and it causes the increase in the threshold voltage, Vth, in PMOS, the increase in the sub-threshold swing, and even the reduction in the reliability of gate insulating films.
In addition, it is known that the boron diffusion is accelerated by a silicon nitride film, if formed, around the boron-implanted silicon film.
In one experiment, various MOS capacitors were fabricated and subjected to different types of heat treatment to discuss the problem with them. Precisely, different types of MOS capacitors were fabricated, comprising a gate electrode of a p-type polysilicon film as layered on an n-type silicon (Si) substrate via a gate oxide film having a varying thickness. In some of those, the gate electrode was coated with a silicon nitride film having a thickness of 80 nm via a thin silicon oxide film therebetween. These MOS capacitors were subjected to different types of heat treatment, and their flat band voltage depending on the thickness of the gate oxide film in them was checked. FIG. 1 shows the gate oxide film thickness dependence of the flat band voltage of the tested MOS capacitors. In this, the vertical axis indicates the flat band voltage(V); and the horizontal axis indicates the thickness (nm) of the gate oxide film.
The p-type gate electrode in those MOS capacitors tested contained boron, and its boron concentration was at least 1xc3x971020/cm3.
The silicon nitride film was formed through reduced CVD at 760xc2x0 C., for which was used a mixed gas of dichlorosilane (SiCl2H2) and ammonia (NH3), and its thickness was 80 nm.
Three types of heat treatment, rapid thermal annealing (RTA) at 1000xc2x0 C. for 10 seconds, furnace annealing in N2 at 800xc2x0 C. for 60 minutes, and furnace annealing in N2 at 760xc2x0 C. for 135 minutes, were applied to the samples singly or as combined.
Of those heat treatment conditions, the furnace annealing in N2 at 760xc2x0 C. for 135 minutes corresponds to the condition for reduced pressure CVD to form a silicon nitride (SiN) film having a thickness of about 80 nm.
During every heat treatment, the surface of the substrate of each sample was entirely covered with a thin capping oxide film so as to protect the boron in the gate electrode from being released away in the ambient vapor phase.
In FIG. 1, the graph I indicates the flat band voltage change in the MOS capacitors not coated with a silicon nitride film, for which the capacitors were subjected to RTA at 1000xc2x0 C. for 10 seconds.
The graph II indicates the flat band voltage change in the MOS capacitors not coated with a silicon nitride film, for which the capacitors were subjected to cycle heat treatment of furnace annealing in N2 at 760xc2x0 C. for 135 minutesxe2x86x92furnace annealing in N2 at 800xc2x0 C. for 60 minutesxe2x86x92RTA at 1000xc2x0 C. for 10 seconds.
The graph III indicates the flat band voltage change in the silicon nitride film-coated MOS capacitors, in which the voltage change was caused by heating the capacitors for forming the silicon nitride film on them.
The graph IV indicates the flat band voltage change in the silicon nitride film-coated MOS capacitors, for which the capacitors were subjected to RTA at 1000xc2x0 C. for 10 seconds.
In those MOS capacitors, when the boron in the gate electrode punches through the gate oxide film to reach the Si substrate, the flat band voltage therein shifts in the positive direction, as being influenced by the surface charge of the Si substrate. As in all those four graphs, the flat band voltage increased with the reduction in the thickness of the gate oxide film. However, as in the graphs I and II, the increase in the flat band voltage is small in the samples not coated with a silicon nitride film. As opposed to those, in the silicon nitride film-coated samples, the increase in the flat band voltage is somewhat larger, as in the graph III. Especially in the silicon nitride film-coated samples that had been subjected to high-temperature heat treatment after the step of forming the silicon nitride film thereon, the increase in the flat band voltage is great, as in the graph IV. This indicates the increase in the amount of boron having punched through the gate oxide film in the silicon nitride film-coated samples having been subjected to the high-temperature post-heating treatment.
From these data, it is obvious that, when a silicon nitride film is formed on a substrate having thereon a p-type polysilicon film and when the substrate is exposed to high temperatures in the film-forming step and in any subsequent step, then boron diffusion is accelerated in that condition and boron will readily punch through a gate oxide film.
In actual MOS transistor fabrication, a silicon nitride film is formed, for example, between interlayer insulating films of silicon oxide for the purpose of increasing the withstand voltage of the interlayer insulating films, or in the vicinity just above the source/drain region as an etching stopping film in a self-aligned contact process, or as a side wall around gate electrodes in a process of self-aligned silicification (SALICIDE, Self-ALIgned siliCIDE).
In general, the silicon nitride film of that type is formed through reduced pressure CVD, for which is used a mixed gas of dichlorosilane (SiCl2H2) and ammonia (NH3) as so mentioned above, and a large amount of hydrogen as generated in this reaction is inevitably taken in the film formed. In this connection, recently, it has been clarified that the hydrogen thus taken in the film causes the accelerated boron diffusion. At present, however, it is extremely difficult to form a silicon nitride film not containing hydrogen, and it is therefore also difficult to retard the boron diffusion that shall be accelerated by hydrogen.
Lowering the temperature for heat treatment or shortening the time for heat treatment will be effective for retarding boron diffusion. However, the former is problematic in that the crystal defects as caused by ion implantation or dry etching could not be restored sufficiently, and will increase leak current; and the former is also problematic in that the dopants could not be activated sufficiently so that the resistance of the diffusion layer and the interconnection layer will increase.
For preventing boron from punching through a gate oxide film, a method of rapid thermal nitrogenation (RTN) of the film has been proposed, which is effected in a nitrogenation atmosphere of NH3, N2O or the like. However, this method is still problematic in that the thickness of the gate insulating film thus processed increases and the carrier mobility lowers to degrade transistor characteristics, and that the fixed charge and the interfacial level increase to lower the reliability of the gate insulating film. For these reasons, the method is not always favorable.
Another method has been proposed, which comprises increasing the grain size of the crystal grains that constitute the polysilicon film to form a gate electrode to thereby reduce the intergranular boundaries to form the paths through which boron diffuses. In this method, a gate electrode is first formed from an amorphous silicon film, then an n-type dopant and a p-type dopant are introduced into the NMOS and PMOS-forming regions, respectively, through ion implantation thereby to attain the dopant introduction into the gate electrode and into the source/drain regions all at a time, and thereafter the amorphous silicon film of the gate electrode is converted into a polysilicon film through crystal growth to be attained simultaneously with activated annealing of the dopants.
In that method, however, the degree of crystallization of amorphous silicon into polysilicon greatly depends on the condition for heat treatment which the amorphous silicon film formed shall undergo in the subsequent steps. Therefore, it could not be said that silicon grains could grow all the time to a satisfactory degree in that method, and, in addition, it could not also be said that the grain growth in the method may be all the time reproducible.
As in the above, at present, the conventional measures for preventing boron diffusion from p-type gate electrodes are not finally conclusive.
Given that situation, the object of the present invention is to provide a method for fabricating MOS transistors having a p-type gate electrode, especially that containing boron as the dopant, along with a hydrogen-containing silicon nitride film, in which boron diffusion from the p-type gate electrode and even boron punching through a gate oxide film can be effectively retarded.
Specifically, to attain its object as above, the invention provides a method for fabricating MOS transistors, which comprises a step of forming a gate electrode of a p-type silicon film on a gate insulating film as formed on the surface of a semiconductor substrate, and a step of forming a silicon nitride film on the substrate, and in which all steps after the step of forming the silicon nitride film are effected within a temperature range within which the diffusion of the p-type dopant existing in the p-type silicon film is prevented from being accelerated by the hydrogen existing in the silicon nitride film.